Getting Started
This chapter provides the steps required to perform the following tasks:
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Download the FPGA development environment for the SC-OBC Module V1
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Build the design using the configuration for the Evaluation Board (EVB1001) provided by Space Cubics, and generate the Versal boot image files PDI (Programmable Device Image) and XSA (Xilinx Support Archive)
Download the SC-OBC Module V1 FPGA Development Environment
git clone https://github.com/spacecubics/sc-obc-v1-fpga
cd sc-obc-v1-fpga/versalBuild the SC-OBC Module V1
The build command differs depending on the OBC Module board grade you are using.
| Images generated with either build option can be used on both hardware variants. However, the configurations differ in DDR4 settings and in the temperature range used for timing verification in Vivado. As a result, using an image built for a different grade may lead to unstable or incorrect operation. This will not cause any physical damage to the board. |