Space Cubics Documentation

SC-OBC Module V1

  • Product Overview
    • Introduction
    • Definition of Terms
    • Block Diagram
    • Key Specifications
  • OBC Module
    • Electrical Specifications
    • Interface Specifications
    • Mechanical Characteristics
  • Development Board
    • Overview
    • Interface Specification
      • Connectors (CON)
      • Switches (SW)
      • LEDs (LED)
      • Jumpers (JP)
    • Jumper Default List
  • Software
    • Overview
    • Setup the Development Environment
    • RPU / Zephyr RTOS
    • APU / Linux
      • Building a Linux Image with Yocto
      • Boot from SD Card
      • Accessing Peripherals
      • Generating Machine Configuration
      • Dualboot
      • Using Custom Yocto Layers
  • FPGA
    • Introduction
    • Getting Started
    • Board Configuration (set_env.tcl)
    • Main Processor (Versal) Development
    • Design Flow
    • Processing System Development
    • Programmable Logic Development
    • IO Configuration
    • Safety Processor (IGLOO2) Development
    • References
  • AI Engine
    • Overview
SC-OBC Module V1 latest
  • SC-OBC Module A1 (en)
    • latest
  • SC-OBC Module A1 (ja)
    • latest
  • SC-OBC Module V1
    • latest
  • SC-OBC Module V1
  • FPGA
  • References
Edit this Page

References

Versal Adaptive SoC Technical Reference Manual (AM011)

Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller v1.1 (PG313)

Versal Adaptive SoC Design Guide (UG1273)

Versal Adaptive SoC SelectIO Resources Architecture Manual (AM010)

This page was built using the Antora default UI.

The source code for this UI is licensed under the terms of the MPL-2.0 license.

Logo